File-name: \PROJECTS\FAF\FAF
File-name: \PROJECTS\FAF\FAF.DOC
900222/900426/900611/921208/930430/94????/950922pc
The FAF-2 (Fast Autonomous Functiongenerator) is a G64 module, which can control a 24 bit digital device. This would normally be the frequency of a RF-synthesizer, which must follow the magnetic field of a bending magnet and a feed-back signal from a beam position sensor. The FAF-2 is controlled by 4 oncard tables written from G64 and from 4 external input, 2 rate signals and 2 corresponding direction signals. These 4 input signals are by one of the four 2K * 16 bit lookup tables and related counters and adders (ref. to DIA206P.TGN FAF LOGICAL FUNCTION) converted to a 22 bit output to the synthesizer. The maximal input rate (B-field rate + Position rate) is approximately 250 Khz.
The FAF-2 is controlled by 4 consecutive parameters in G64 (hereafter referred to as P0, P1, P2 and P3) where P0 is the main control register with the following layout:
Some of the P0 command bits can be modified by external input from a DAF.
P0 command (read back as P0 status):
Bit 15: 0 - Static operation, P1..3 will be connected to internal registers
1 - Dynamic operation, internal registers will be loaded from relevant 'start value registers'
Bit 14: Enables external command word modifier
Bit 13: Enable B-field rate input
and'ed with external command input (timing DAF bit 1)
Bit 12: Enable position rate input
and'ed with external command input (timing DAF bit 0)
Bit 11-10: Slope coefficient table number for vectoring (FAF mode)
Bit 9-8: Slope coefficient table number for loading
Controls transfer of parameter values to start registers.
Bit 7-0: Unused
P0 data: Unused
When bit 15 is 0, P0..3 are transferred to internal counters etc. and to the start registers belonging
to the selected 'Slope coefficient table for loading'.
When bit 15 is 1, P0..3 are only transferred to the start registers of the selected 'Slope coefficient
table for loading'.
94???? - change of table loading mechanism:
The 4 coefficient tables are connected to the 4 parameters, Table 0 to P0 etc. For backward compatibility parameter 0 table data is still multiplexed to the other tables selected by bit 8-9 in P0 command.
External command inputs must be strobed into the FAF external command register by bit 7 of the corresponding timing DAF. This register is preset to 'no function' (bit-210=011) at reset.
Relationship between command and external control input:
Command: bit: value:
Dynamic operation 15 0 1 1 1
Enable extern modifier 14 x 0 1 1
Enable B-field input 13 x B B x
Enable position input 12 x P P x
Slope coeff. table for vectoring bit 1 11 T1 T1 x x
Slope coeff. table for vectoring bit 0 10 T0 T0 x x
Extern command input:
Load start values DAF-2 x x 0 1
Enable B-field input / Table select 1 DAF-1 x x b t1
Enable position input / Table select 0 DAF-0 x x p t0
Result (status):
Dynamic operation not LOAD (=direct write) 15 0 1 1 0
B-Field enabled 13 0 B B and b 0
Position rate enabled 12 0 P P and p 0
Slope coeff. table for vectoring bit 1 11 T1 T1 last t1 t1
Slope coeff. table for vectoring bit 0 10 T0 T0 last t0 t0
Display (status): ST BP BP LD
Important!! - remember to set DAF bit 7 whenever extern control bits has to be changed.
P0 data: High 7 bit of multiplier (0..127)
The Prescaler and multiplier constants are controlled by P1, where:
P1 command: Prescaler divide ratio (2..4096)
P1 data: Low 16 bit of multiplier constant (0..65535)
The counter and prescaler can be preset by P2, where:
P2 command: Set counter value (0..2047)
P2 data: Set prescaler value (0..prescaler divide ratio -1)
Finally the output latch can be preset by P3, where:
P3 command: Set high latch value (=latch bit 30..45; =16 msb of output)
P3 data: Set low latch value (=latch bit 14..29)
The corresponding status parameters will hold the present last read values from the module.
With the current synthesizer the frequency relationships is as follows:
< IMG src="Image7.gif" WIDTH=260 HEIGHT=132 ALIGN="LEFT" HSPACE=8 VSPACE=4>Where FC (=FCLOCK) in the current synthesizer is very close to 20 Mhz.
The 4 coefficient tables are sent to the DAF from the G64 CPU, which receives them from a DOCT or a PC. If the tables are sent from a DOCT, this will have received them from either CAMAC or a PC.
If the tables originate from CAMAC, they will follow the rules below.
All FAF-2 table transfer from CAMAC to G64 is done via channel 7 (PC-channel) in DOCT.
P0 bit 9-8 controls in which table (0..3) the FAF-2 will place the incoming table data for parameter 0 data. Table data to parameters 1 to 3 is placed in the corresponding table. As the 4 tables each are 2K * 16, and the maximal single table size possible in the G64 communication protocol is 256 * 8 (or 128 * 16), one 2K * 16 table has to be partitioned into 8 double G64-tables with the following mapping in the DOCT.
table addr data area
in FAF-2 in DOCT
+--------------------------------------------------------------------+
¦ 2047 ¦ par 63 - data ¦ ¦
¦ ¦ par 63 - command ¦ ¦
¦ ¦ | UPPER LIMIT AREA ¦ ¦
¦ ¦ par 0 - data =DAF INCREMENT ¦ PARTITION = ¦
¦ 2020 ¦ par 0 - command ¦ DAF TABLE = 7 ¦
¦ +---------------------------------------¦ ¦
¦ 2019 ¦ par 63 - data ¦ bit 12-10 in ¦
¦ ¦ par 63 - command ¦ transfer reg. ¦
¦ ¦ | LOWER LIMIT AREA ¦ ¦
¦ ¦ par 0 - data =DAF LOOPCNT ¦ ¦
¦ 1992 ¦ par 0 - command ¦ ¦
¦ +---------------------------------------+--------------------¦
¦ +---------------------------------------+--------------------¦
¦ 511 ¦ par 63 - data ¦ ¦
¦ ¦ par 63 - command ¦ ¦
¦ ¦ | UPPER LIMIT AREA ¦ ¦
¦ ¦ par 0 - data =DAF INCREMENT ¦ PARTITION = ¦
¦ 384 ¦ par 0 - command ¦ DAF TABLE = 1 ¦
¦ +---------------------------------------¦ ¦
¦ 383 ¦ par 63 - data ¦ bit 12-10 in ¦
¦ ¦ par 63 - command ¦ transfer reg. ¦
¦ ¦ | LOWER LIMIT AREA ¦ ¦
¦ ¦ par 0 - data =DAF LOOPCNT ¦ ¦
¦ 256 ¦ par 0 - command ¦ ¦
¦ +---------------------------------------+--------------------¦
¦ 255 ¦ par 63 - data ¦ ¦
¦ ¦ par 63 - command ¦ ¦
¦ ¦ | UPPER LIMIT AREA ¦ ¦
¦ ¦ par 0 - data =DAF INCREMENT ¦ PARTITION ¦
¦ 128 ¦ par 0 - command ¦ DAF TABLE = 0 ¦
¦ +---------------------------------------¦ ¦
¦ 127 ¦ par 63 - data ¦ bit 12-10 in ¦
¦ ¦ par 63 - command ¦ transfer reg. ¦
¦ ¦ | LOWER LIMIT AREA ¦ ¦
¦ ¦ par 0 - data =DAF LOOPCNT ¦ ¦
¦ 0 ¦ par 0 - command ¦ ¦
+--------------------------------------------------------------------+
The transfer is controlled by parameter 63 (transfer reg.) in channel 7.
COMMAND from CAMAC to DOCT:
par. 63 - data bit 15 - 0 (send ALARM TABLE AREA) - unused
- bit 14 - 1 (send LOWER LIMIT AREA)
- bit 13 - 1 (send UPPER LIMIT AREA)
- bit 12-10 - partition number (0 - 7)
- bit 9-7 - physical channel no.
- bit 6-1 - parameter number (=P0)
- bit 0 - 0
BYTE COUNT from CAMAC to DOCT:
par. 63 - command bit 0-7 - 0 (number of bytes in UPPER/LOWER LIMIT AREA to
send; 0 means 256)
- command bit 8-15 - 0 (number of bytes in ALARM TABLE AREA to
send; 0 means 256) - unused
STATUS from DOCT to CAMAC:
par. 63 - data bit 15-7 - unused
- bit 6 - ALARM TABLE AREA sent - unused
- bit 5 - LOWER LIMIT AREA sent
- bit 4 - UPPER LIMIT AREA sent
- bit 3 - no such FAF/parameter configuration in G64
- bit 2 - no response from G64
- bit 1 - command executed
- bit 0 - command accepted
The suggested flow in DAF communication from CAMAC to DOCT:
repeat until status = 0 ; wait if tables in use (should never
occur)
write tables
write byte count
write command
repeat until status and 2 = 2 ; wait until all tables send
test if status and C(hex) <> 0 ; any errors ?
write command = -1 ; release FAF communication tables
The FAF-2 has an optional display unit with 2 lines of 16 characters giving the following information:
P123:456 I123.45
Txx V123456.7890
Where: P shows current counter and prescaler value (counter:prescaler)
= current pointer into slope coefficient table
I shows current slope increment value
= slope coefficient from table * multiplier
T shows current coefficient table number (0..3)
xx shows:
DW if direct write is enabled
B if B-field input is enabled
P if position input is enabled
V shows current vector value
all values presented in hex
All communication between G64 and FAF are initiated from G64 and uses the following I/O-addresses:
Base address + 0: Interrupt control (ICR R/W)
1: Command vector (CVR R/W)
2: Interrupt status (ISR R)
3: Interrupt vector (IVR R/W) (unused, no vectored int. on G64 bus)
4: Hardware reset of module (WRITE)
5: RX/TX byte high (RXH/TXH R/W)
6: RX/TX byte middle (RXM/TXM R/W)
7: RX/TX byte low (RXL/TXL R/W)
Bit layout of Interrupt control (ICR)
Bit 7: Initialize (INIT)
6-5: 00 = DMA mode off (HM1-HM0)
4: Host Flag 1 (HF1)
3: Host Flag 0 (HF0)
2: Unused
1: Enable transmit interrupt on HREQ pin (TREQ)
0: Enable receive interrupt on HREQ pin (RREQ)
Bit layout of Command vector (CVR)
Bit 7: Request Host Command Interrupt, reset in Status when accepted (HC)
6-5: Reserved/unused
4-0: Host Vector Number
Bit layout of Interrupt status (ISR)
Bit 7: Status of HREQ pin (HREQ)
6: DMA status (or of bit 6-5 of interrupt control) (DMA)
5: Reserved/unused
4: Host flag 3 (HF3)
3: Host flag 2 (HF2)
2: Transmitter data register and buffer empty (TRDY)
1: Transmitter data register empty (TXDE)
0: Receive data register full (RXDF)
The following Host Command Vector Interrupts are used:
HV = 13h : Start coefficient table transfer, TXM = partition + type + part:
bit 0-2 = partition
3 = copies into A7 of table addr.
4-6 = 0
7 = 0: addr offset = 0
1: addr offset = 10d
TXL = number of bytes to transfer
This will set the table-address-pointer and enable host data interrupt,
whereafter table-data are sent to TXM-TXL, this will cause host-data-interrupt
and transfers data to table until byte count reached. Finally host-data-
interrupt are disabled and OK-response (13h=HV) are put into RXL register.
HV = 14h : Transmit command byte, return status byte.
Command word to TXM-TXL, HCV-int 14h, read status word in RXM-RXL.
HV 15-1Ah : Transmit to FAF registers and get old value of same register.
If no word is sent to TXM-TXL it will be regarded as a read only function.
HV = 15h : Transmit prescaler max value, return same.
HV = 16h : Transmit low 16 bit of multiplier constant, return same.
HV = 17h : Transmit counter value, return same.
HV = 18h : Transmit prescaler value, return same.
HV = 19h : Transmit latch value high, return same.
Will read current latch value, new latch value will written on next HV=1A command.
HV = 1Ah : Transmit latch value low, return same.
Will use low value of last HV=19 command, and update latch with high value from
last HV=19 command and low value from current HV=1A command.
HV = 1Bh : Dummy function, empty host registers TXM-TXL.
HV = 1Ch : Transmit high 7 bit of multiplier constant, return same.
Last Modified 04 February 2019